Add workaround for errata 790748 for Cortex-A75
authorLouis Mayencourt <[email protected]>
Mon, 25 Feb 2019 14:57:57 +0000 (14:57 +0000)
committerLouis Mayencourt <[email protected]>
Tue, 26 Feb 2019 16:20:59 +0000 (16:20 +0000)
commit98551591f5371de2c2f0dee6be2e12b75653f04d
tree8d894f2bf5d5e3ec7d29ca270169c2c37457e814
parent5f5d1ed7d5a7626b2da48f3ac423d366bbee1fd8
Add workaround for errata 790748 for Cortex-A75

Internal timing conditions might cause the CPU to stop processing
interrupts. Set bit 13 of CPUACTLR_EL1 to prevent this.

Change-Id: Ifdd19dbcdb71bb0d9609cab1315c478aaedb03ba
Signed-off-by: Louis Mayencourt <[email protected]>
docs/cpu-specific-build-macros.rst
lib/cpus/aarch64/cortex_a75.S
lib/cpus/cpu-ops.mk